As the manufacturing processes of the semiconductor devices are continuously improved, the feature size of the semiconductor device continually reduces to increase the quantity of the devices per area and to improve the capacity and the performance of the devices. For example, a traditional planar metal-oxide-semiconductor field-effect transistor (MOSFET) has been replaced by a trench-type semiconductor device to increase the quantity of the devices per area. However, as the device is scaled down to nano-level, the processes of making the MOSFET encounter many difficulties and problems. For example, as the feature size of the semiconductor device reduces, charges will be captured and accumulated in the channel region due to the interference from the electric field of adjacent transistors, which is also known as floating body effect.
If the problems caused and the size reduce of the device are not overcome, the capacity of the device may not be increased and/or the performance of the device will be negatively affected. Therefore, it is desired to provide a semiconductor device structure and a method for forming the same to avoid floating body effect.